Edge Computing Jobs

58 jobs

Results

NXP Semiconductors logo

Senior Embedded Crypto Software Developer (m/f/d)

2 weeks ago

NXP Semiconductors Bucharest, Romania

Designs and implements cross-platform cryptographic algorithms, including post-quantum cryptography, plus software countermeasures against side-channel and fault-injection attacks. Works with security architects, OS/firmware and evaluation teams on embedded C/Assembly for ARM Cortex-M and RISC-V, supporting certification and security evaluations.

Hybrid
NXP Semiconductors logo

Principal Embedded Crypto Software Developer (m/f/d)

2 weeks ago

NXP Semiconductors Gratkorn, Austria

Designs and implements cross-platform cryptographic algorithms, including post-quantum cryptography, and develops software countermeasures against side-channel and fault-injection attacks. Provides technical leadership across cryptographic domains, collaborating with security architects, evaluation, OS and firmware teams, and drives product certification and security evaluations.

Hybrid

Graduate Electronics & Software Engineer (2027 start)

3 weeks ago

Cambridge Consultants United Kingdom

Graduate role working on client assignments across embedded systems, spanning analogue and digital hardware, FPGA design, PCB layout and embedded C software. You'll rotate across disciplines and markets from consumer devices to defence, with mentoring to grow into a technologist. Requires SC clearance and 5 years' UK residency.

On-site Permanent Clearance Required

Senior Embedded Systems Engineer

Yesterday

Jonathan Lee Recruitment Bicester

As a Senior Embedded Systems Engineer, you will work on the full product lifecycle, from concept to production, focusing on embedded firmware development, electronics design, and new product innovation. You will collaborate closely with the R&D team, using a variety of embedded platforms and communication interfaces to develop cutting-edge technology.

Hybrid Permanent

Technology Leader - Signal Processing Design and Integration

Last month

Cambridge Consultants United Kingdom

Lead signal processing design and integration project teams, architecting software for high-performance hardware and contributing to multi-domain system design. Work spans wireless, telecoms, audio and semiconductor clients, from blue chips to start-ups, with responsibility for IP development, sales campaigns and mentoring engineers.

Hybrid
NXP Semiconductors logo

Principal Digital Design Engineer

Last month

NXP Semiconductors Toulouse, France

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, working closely with architecture, analog, DV and validation teams through tape-out and silicon bring-up.

Hybrid Permanent
NXP Semiconductors logo

Principal Digital Design Engineer

Last month

NXP Semiconductors Eindhoven, Netherlands

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, with close coordination across architecture, analog, DV and validation teams through tape-out and silicon bring-up.

Hybrid Permanent
NXP Semiconductors logo

Principal Digital Design Engineer

Last month

NXP Semiconductors Hamburg, Germany

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, documentation and close collaboration with verification, validation and analog design teams through tape-out and silicon bring-up.

Hybrid Permanent
NXP Semiconductors logo

Principal Digital Design Engineer

Last month

NXP Semiconductors Glasgow

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. Implement design intent in SystemVerilog or Chisel, manage junior engineers, and coordinate with verification and validation teams on automotive functional safety processes.

Hybrid Permanent
NXP Semiconductors logo

Principal Digital Design Engineer

Last month

NXP Semiconductors Gratkorn, Austria

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, working closely with architecture, analog, DV and validation teams through tape-out and silicon bringup.

Hybrid Permanent
NXP Semiconductors logo

(Senior/Principal) Software Security Architect (m/f/d)

Last month

NXP Semiconductors Gratkorn, Austria

Define and review security architectures for embedded software, firmware and secure platforms, performing threat modelling, risk assessments and vulnerability investigations. Work alongside cryptographers, certification bodies and evaluation labs to embed security-by-design across the product lifecycle for chips used in payments, ePassports, automotive and IoT.

Hybrid
NXP Semiconductors logo

Senior Digital Verification Engineer, Crypto & Security

Last week

NXP Semiconductors Gratkorn, Austria

Lead verification of post-quantum cryptography and security IP, architecting SystemVerilog/UVM environments and driving coverage closure with constrained random and metrics-driven methods. The role blends traditional verification with AI-driven automation, including intelligent debug, automated test generation and coverage prioritisation, while mentoring engineers and shaping verification strategy from early design stages.

Hybrid
NXP Semiconductors logo

Senior Digital Verification Engineer, Crypto & Security

Last week

NXP Semiconductors Glasgow

Lead verification of post-quantum cryptography and security IP, architecting SystemVerilog/UVM environments and driving coverage closure with constrained random and metrics-driven methods. The role blends traditional verification with AI-driven automation, including intelligent debug, automated test generation and coverage prioritisation, while mentoring engineers and shaping tools and processes.

Hybrid

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