Edge Computing Jobs

Platform Recruitment · Cambridge · £80,000 – £85,000 pa

Lead the software design and development of embedded and connected systems, taking a system-wide view that balances firmware, hardware, connectivity and cloud considerations. Working directly with clients to define products from idea through to production, and leading a team of multidisciplinary engineers without line management duties. Projects are varied and largely outside heavy industry regulation, giving freedom to be creative.

Platform Recruitment · Cambridge · £40,000 – £65,000 pa

Own a bare-metal control stack for ARM-based microcontrollers, developing, debugging and optimising firmware while adding features to an existing codebase and documenting low-level designs. Work closely with hardware engineers on schematics and drivers for SPI, I2C, UART, ADC and DAC, in an Agile R&D team with a high degree of autonomy.

NXP Semiconductors · Bucharest, Romania

Designs and implements cross-platform cryptographic algorithms, including post-quantum cryptography, for embedded ARM Cortex-M and RISC-V platforms. Develops software countermeasures against side-channel analysis and fault injection attacks, collaborating with security architects, evaluation teams, and firmware engineers. Supports certification efforts up to Common Criteria EAL 6+ across payment, IoT, automotive, and identification domains.

NXP Semiconductors · Glasgow

Designs and implements cryptographic algorithms, including post-quantum cryptography, for embedded ARM Cortex-M and RISC-V platforms, and develops software countermeasures against side-channel and fault-injection attacks. Works with security architects, firmware and evaluation teams to integrate secure libraries into products and support certification up to Common Criteria EAL 6+.

NXP Semiconductors · Bucharest, Romania

Technical member of a Product Security Incident Response Team triaging reported vulnerabilities across hardware, firmware, software and embedded platforms. Reproduces issues with product experts, assesses exploitability and severity using CVSS/CWE, and authors CVE records, advisories and researcher communications while advising product teams on secure engineering.

NXP Semiconductors · Leuven, Belgium

Technical member of NXP's Product Security Incident Response Team, triaging reported vulnerabilities across hardware, firmware, software and embedded platforms. Reproduces issues with product experts, assesses exploitability and severity, and drafts CVE records, advisories and researcher communications. Also advises product teams on vulnerability management and recurring security patterns.

NXP Semiconductors · Glasgow

Technical member of NXP's Product Security Incident Response Team, triaging reported vulnerabilities across hardware, firmware, software and embedded platforms. Reproduces issues with product teams, assesses exploitability and severity, and produces CVE records, advisories and researcher communications. Distinct for its deep semiconductor and low-level focus, spanning secure boot, debug interfaces and side-channel analysis.

NXP Semiconductors · Glasgow

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. Implement design intent in SystemVerilog or Chisel, manage junior engineers, and coordinate with verification and validation teams on automotive functional safety processes.

NXP Semiconductors · Eindhoven, Netherlands

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, with close coordination across architecture, analog, DV and validation teams through tape-out and silicon bring-up.

NXP Semiconductors · Toulouse, France

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, working closely with architecture, analog, DV and validation teams through tape-out and silicon bring-up.

NXP Semiconductors · Gratkorn, Austria

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, working closely with architecture, analog, DV and validation teams through tape-out and silicon bringup.

NXP Semiconductors · Hamburg, Germany

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, documentation and close collaboration with verification, validation and analog design teams through tape-out and silicon bring-up.