Edge Computing Jobs

NXP Semiconductors · Eindhoven, Netherlands

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, with close coordination across architecture, analog, DV and validation teams through tape-out and silicon bring-up.

NXP Semiconductors · Hamburg, Germany

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, documentation and close collaboration with verification, validation and analog design teams through tape-out and silicon bring-up.

Technical Futures Ltd · Cambridge

Design, build and test embedded systems across robotics, sensing, communications and IoT, working on Linux-based systems, bare-metal, RTOS, device drivers, algorithms and protocols. You'll join a multi-disciplinary consultancy team supporting projects from concept to delivery alongside FPGA and electronics engineers, with hybrid working (3 days office, 2 WFH).

Jonathan Lee Recruitment · Bicester

As a Senior Embedded Systems Engineer, you will work on the full product lifecycle, from concept to production, focusing on embedded firmware development, electronics design, and new product innovation. You will collaborate closely with the R&D team, using a variety of embedded platforms and communication interfaces to develop cutting-edge technology.

Cambridge Consultants · United Kingdom

Lead signal processing design and integration project teams, architecting software for high-performance hardware and contributing to multi-domain system design. Work spans wireless, telecoms, audio and semiconductor clients, from blue chips to start-ups, with responsibility for IP development, sales campaigns and mentoring engineers.

Enterprise Recruitment · New Malden

Six-month contract developing embedded C++ software on Linux, working close to the hardware with real-time multi-threaded concepts. The role involves build environments such as OpenEmbedded, Bitbake and Makefiles, plus networking work with UDP, TCP/IP and analysis tools like Wireshark. After an initial on-site period, two days a week can be worked from home.

NXP Semiconductors · Glasgow

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. Implement design intent in SystemVerilog or Chisel, manage junior engineers, and coordinate with verification and validation teams on automotive functional safety processes.

NXP Semiconductors · Gratkorn, Austria

Lead a team of engineers designing and implementing in-vehicle networking transceivers, defining block requirements and architecture optimised for area, power and timing. The role spans SystemVerilog or Chisel implementation, functional safety, DFT and static timing closure, working closely with architecture, analog, DV and validation teams through tape-out and silicon bringup.

NXP Semiconductors · Gratkorn, Austria

Define and review security architectures for embedded software, firmware and secure platforms, performing threat modelling, risk assessments and vulnerability investigations. Work alongside cryptographers, certification bodies and evaluation labs to embed security-by-design across the product lifecycle for chips used in payments, ePassports, automotive and IoT.

NXP Semiconductors · Gratkorn, Austria

Lead verification of post-quantum cryptography and security IP, architecting SystemVerilog/UVM environments and driving coverage closure with constrained random and metrics-driven methods. The role blends traditional verification with AI-driven automation, including intelligent debug, automated test generation and coverage prioritisation, while mentoring engineers and shaping verification strategy from early design stages.

NXP Semiconductors · Glasgow

Lead verification of post-quantum cryptography and security IP, architecting SystemVerilog/UVM environments and driving coverage closure with constrained random and metrics-driven methods. The role blends traditional verification with AI-driven automation, including intelligent debug, automated test generation and coverage prioritisation, while mentoring engineers and shaping tools and processes.