DFT Engineer

Raspberry Pi is seeking a DFT engineer to join our expanding ASIC team to help deliver our next-generation products. We have been building our own silicon at Raspberry Pi for some years now, starting with the RP2040 microcontroller in 2021, and following with the RP1 southbridge chip for the main Raspberry Pi platform on Raspberry Pi 5. Our second-generation microcontroller, RP2350, was released in 2024. The ASIC team looks after everything in the silicon flow, from specification through design, verification, and implementation, including ATE test and qualification. With a small team, we get involved in all aspects of getting successful products into production.

As a DFT Engineer you will be responsible for creating, implementing, and verifying DFT solutions on future Raspberry Pi ASIC designs to ensure quality standards are maintained for products shipping in volume. You will use advanced DFT methods to balance requirements for test coverage, cost, and time to market.

The successful candidate will be:

• Able to define a suitable DFT strategy at chip, subsystem, and IP level, including structural and functional methods, and make pragmatic trade-offs between methods.
• Experienced with Tessent DFT tool flow for inserting MBIST, EDT, SSN, scan controls via IJTAG, and IP test using ICL/PDL, in both flat and hierarchical designs.
• Experienced in verification of DFT structures, and debugging related issues.
• Able to support DFT through implementation and sign-off, including generating timing constraints and debugging timing, power, and formal equivalence issues.
• Willing to share knowledge and mentor other members of the team.